The present invention relates to selectors for use in various logic circuits and integrated circuit devices including such circuits and more particularly relates to a selector with a nonvolatile memory function and an IC circuit device including such a selector.
Multiplexers and demultiplexers are basic logic circuits for MISFETs that have been widely used in recent years. Multiplexers and demultiplexers, also referred to as xe2x80x9cselection circuitsxe2x80x9d and xe2x80x9cdistribution circuitsxe2x80x9d, are circuits for selecting input data according to selection signals and circuits for distributing input data according to selection signals, respectively.
FIGS. 14(a) and 14(b) are an electric circuit diagram of a known 4-input multiplexer and a table showing the input-output relation in the multiplexer in accordance with selection signals, respectively. As shown in FIG. 14(a), the known multiplexer includes: four pre-stage-side NMISFETs 1001 through 1004 for receiving four input signals In1, In2, In3 and In4, respectively; a subsequent-stage-side NMISFET 1005 for receiving outputs from the two pre-stage-side NMISFETs 1001 and 1002; a subsequent-stage-side NMISFET 1006 for receiving outputs from the two pre-stage-side NMISFETs 1003 and 1004; an output terminal 1007 for receiving outputs from the two subsequent-stage-side NMISFETs 1005 and 1006; a pre-stage-side SRAM 1011 for supplying a selection signal D1 to the two pre-stage-side MISFETs 1001 and 1003 and an inverted selection signal /D1 to the two pre-stage-side MISFETs 1002 and 1004; and an SRAM 1012 for supplying a selection signal D2 to the subsequent-stage-side MISFET 1005 and an inverted selection signal /D2 to the subsequent-stage-side MISFET 1006.
As shown in FIG. 14(b), any one of the input signals In1 through In4 is uniquely selected as an output signal Out according to the four different combinations of the logical values of the selection signals D1 and D2. In other words, the output signal Out is changed in one-to-one correspondence with the combinations of the selection signals D1 and D2.
A demultiplexer, on the other hand, operates in the opposite input-output relation to the multipleplexer. Specifically, assuming that the input signals In1 through In4 are input from the output terminal 1007, one of the input signals In1 through In4 is uniquely output from one of the corresponding input terminals to the input signals In1 through In4 shown in FIG. 14(a), according to the four types of data of the selection signals D1 and D2.
Problems that the Invention is to Solve
As has been described, in the known multiplexer, control data is pre-stored in an SRAM (FF) and multiplex operation is carried out according to the content of the pre-stored data. Accordingly, when data in the SRAM is retained, i.e., in the state where power is ON in a circuit, the operation of the multiplexer is carried out in accordance with the stored content in the SRAM. After power has been turned OFF, however, in order to carry out operation of the multiplexer, means for storing data in the SRAM is needed.
It is also possible to store the data that have been stored in the SRAM in a nonvolatile memory such as a flash memory and download the data stored in the nonvolatile memory to the SRAM of the mutiplexer in operating the multiplexer. This, however, additionally requires a nonvolatile memory and a download operation.
As for portable devices that have been widely used in recent years, considering power supply, such as batteries, and power consumption, the function of storing operation in a nonvolatile state is required. If a device is provided with only the function of storing data in a volatile state, data at power-on has to be re-downloaded.
When a circuit such as multiplexer is applied to a neuro device which carries out arithmetic operations and learning using previously processed data, stored contents being volatile also come into question.
Then, the present inventors made attempts to configure a circuit, such as a multiplexer, by using a device with a nonvolatile memory function.
Flash memories and ferroelectric memories (FRAMs) have been out in the market as typical devices having a nonvolatile memory function. Specifically, there have been proposed MFSFETs (metal ferroelectric semiconductor FETs), MFMSFETs (metal ferroelectric metal semiconductor FETs), and MFMISFETs (metal ferroelectric metal insulator semiconductor FETs) (which will be hereinafter referred to as xe2x80x9cMFS-type-FETsxe2x80x9d) each of which can be obtained by forming a gate insulating film from a ferroelectric film in a MISFET (metal insulator semiconductor field effect transistor). Such a MFS-type-FET is expected to function as a small-scaled nonvolatile memory that is operable at high speed.
The MFS-type-FETs utilize the fact that when a higher voltage than the coercive electric field of a ferroelectric material is applied between the semiconductor substrate and a gate electrode, the polarization of a ferroelectric film is changed and residual dielectric polarization occurs in the ferroelectric film even after the application of a voltage has been stopped. More specifically, a MFS-type-FET turns in a normal ON state or a normal OFF state depending on the direction of the residual dielectric polarization, and then an ON/OFF difference in the FET is stored as information.
However, to cause inversion in polarization in a ferroelectric film, application of a voltage between a gate and a semiconductor substrate is necessary. When 2-value logic values L (0V) and H (supply voltage VDD) for use in regular logic devices are used, application of a reverse field between a substrate and a gate electrode is required in order to reverse the residual dielectric polarization in the ferroelectric film. This results in a problem that the device configuration becomes complex.
An object of the present invention is to provide a nonvolatile selector which includes a ferroelectric film and utilizes a FET having a simple configuration different from that of a known MFSFET to carry out a nonvolatile operation for selecting a signal, and to provide an integrated circuit device using such a selector.
A nonvolatile selector which includes at least one unit selector and, according to a selection signal and an inverted selection signal, blocks at least one input signal of a plurality of input signals and passes the other signals, characterized in that the unit selector includes: at least one serial capacitor that includes a first capacitor and a second capacitor which are connected to each other in series with an intermediate node located therebetween and at least one of which is a ferroelectric capacitor, and receives the selection signal and the inverted selection signal at both ends, respectively; a first FET including a gate electrode connected to the intermediate node of the serial capacitor, and first and second impurity doped layers functioning as an input section and an output section, respectively; and a second FET including a gate electrode connected to the intermediate node of the serial capacitor, and first and second impurity doped layers functioning as an input section and an output section, respectively, and when the selection signal and the inverted selection signal are received at both ends of the serial capacitor, the potential at the intermediate node is varied according to the logical value of the inverted selection signal so that one of the first and second FETs turns ON and the other turns OFF.
In the unit selector, assume that when the logical value of a selection signal is 1, the first FET and the second FET turns ON and OFF, respectively, according to the potential of the intermediate node. When the logical value of the selection signal is 0, the first FET and the second FET turns OFF and ON, respectively, according to the potential of the intermediate node. Thus, the selector function can be ensured. Since the potential of the intermediate node is maintained by residual dielectric polarization, a selector having the nonvolatile memory function as well as a simple device structure can be achieved.
If first and second serial capacitors are provided as said at least one serial capacitor, the intermediate node of the first serial capacitor is connected to the gate electrode of the first FET, the intermediate node of the second serial capacitor is connected to the gate electrode of the second FET, the first and second FETs have the same conductivity type, the first capacitor of the first serial capacitor and the second capacitor of the second serial capacitor are connected to each other via a common first line, the second capacitor of the first serial capacitor and the first capacitor of the second serial capacitor are connected to each other via a common second line, and the selection signal or the inverted selection signal is supplied via the first line while the inverted selection signal or the selection signal is supplied via the second line, high-speed operation can be achieved by using, for example, only an n-channel FET.
In that case, if the first and second capacitors in each of the first and second serial capacitors are a pair of ferroelectric capacitors that include respective ferroelectric films having different hysteresis characteristics of polarization depending upon applied voltages, the nonvolatile memory function can be achieved more reliably.
If the respective capacitance values of the ferroelectric capacitors of each said pair in the first and second serial capacitors differ from each other according to the difference between the thicknesses of the ferroelectric films formed of the same material, this simplifies process steps while preventing an increase in the area occupied.
If the respective capacitance values of the ferroelectric capacitors of each said pair in the first and second serial capacitors differ from each other according to the difference between the areas of the ferroelectric films formed of the same material, designing can be easier and the number of process steps can be reduced.
One of the first and second capacitors of each of the first and second serial capacitors may be a ferroelectric capacitor and the other may be a paraelectric capacitor.
If the inventive nonvolatile selector further includes another unit selector and said another unit selector includes: another first FET including a gate electrode connected to the intermediate node of the first serial capacitor, and first and second impurity doped layers functioning as an input section and an output section, respectively, and another second FET including a gate electrode connected to the intermediate node of the second serial capacitor, and first and second impurity doped layers functioning as an input section and an output section, respectively, the number of serial capacitors in the nonvolatile selector can be reduced. Accordingly, a nonvolatile selector with a small area occupied can be achieved.
If a serial capacitor is provided as said at least one serial capacitor, and one of the first and second FETs is an n-channel FET and the other is a p-channel FET, the number of serial capacitors can be reduced in every unit selector, resulting in a nonvolatile selector with a still smaller area occupied.
If the first and second capacitors in the serial capacitor are a pair of ferroelectric capacitors that include respective ferroelectric films having different hysteresis characteristics of polarization depending upon applied voltages, the nonvolatile memory function can be obtained more reliably.
One of the first and second capacitors of the serial capacitor may be a ferroelectric capacitor and the other may be a paraelectric capacitor.
If a nonvolatile selector further includes a gate section which includes 2nxe2x88x921 (n is a natural number as great as or greater than 2) pairs of the first and second FETs that receive 2n input signals and in which 2nxe2x88x921 unit selectors that receives common selection and inverted selection signals at both ends of the serial capacitors are disposed, an operation state of one gate section can be stored in a volatile state.
If a plurality of the gate sections are disposed such that the number of the unit selectors in each subsequent-stage section is reduced to half that in the previous-stage gate section, the multiplexer function can be ensured.
If a serial capacitor that includes a first capacitor and a second capacitor which are disposed at the output side in the final-stage gate section of the gate sections and connected to each other in series with an intermediate node located therebetween and at least one of which is a ferroelectric capacitor and, receives the output signal and the inverted output signal at both ends, respectively, operation can be started at the next power-on in the same state as at the time when the power supply has been cut.
A semiconductor integrated circuit according to the present invention is a semiconductor integrated circuit including a selector that includes at least one unit selector and, according to a selection signal and an inverted selection signal, blocks at least one input signal of a plurality of input signals and passes the other signals, in which the unit selector includes: at least one serial capacitor that includes a first capacitor and a second capacitor which are connected to each other in series with an intermediate node located therebetween and at least one of which is a ferroelectric capacitor, and receives the selection signal and the inverted selection signal at both ends, respectively; a first FET including a gate electrode connected to the intermediate node of the serial capacitor, and first and second impurity doped layers functioning as an input section and an output section, respectively; and a second FET including a gate electrode connected to the intermediate node of the serial capacitor, and first and second impurity doped layers functioning as an input section and an output section, respectively, and when the selection signal and the inverted selection signal are received at both ends of the serial capacitor, the potential at the intermediate node is varied according to the logical value of the inverted selection signal so that one of the first and second FETs turns ON and the other turns OFF, and the semiconductor integrated circuit functions as an FPGA (field programmable gate-array), or is disposed in a recognition system or an encryption chip circuit.
With the inventive semiconductor integrated circuit, the need to dispose an additional memory such as an SRAM for storing various data and then latch the stored data is eliminated, and thus the configuration and control of a circuit can be simplified.